A typical semiconductor fabrication process includes steps for deposition and or growth of a thin semiconductor film over a substrate and then forming features within the thin semiconductor film by a series of diffusion and deposition steps. For example, it is common to epitaxially grow a thin layer of silicon over a silicon substrate, which is usually cut out of an ingot, and then forming PN junctions within the thin layer to form the basic parts of a semiconductor device. Depending on the device other parts of the device can then be formed by a series of deposition and etching steps. For example, in a typical field effect transistor channel regions may be formed by implantation and diffusion dopants and the gate structures are formed adjacent the channel region by growing a gate oxide and deposition and patterning a conductive material to form the gate electrodes.
The conventional methods often include masking steps to define the areas that are to be implanted. The masks are formed lithographically and often include dimensional errors, even in well controlled processes.
Typically, design rules are often developed to reduce the adverse effects of such errors. Design rules, however, may unnecessarily call for larger dimensions in the mask in order to compensate for processing errors. Thus, features in a device may be larger than necessary, thereby consuming more material than ideally required.
In addition, forming a PN junction by diffusion involves implanting dopants of one conductivity in a semiconductor body of another conductivity and driving the same at a high temperature to activate and diffuse the dopants to a desired depth and lateral extent. The diffusion process usually results in a tub-shaped region of one conductivity, in a region of another conductivity. Under reverse voltage conditions, the corners of such tub-shaped regions develop high electric fields and breakdown at voltages much lower than the theoretical breakdown limits for a PN junction having a radius of curvature of infinity, (i.e. an ideal PN junction). As a result, the concentration of dopants or the thicknesses of the semiconductor regions must be increased to compensate for the lowering of the breakdown voltage. Furthermore, diffusion results in a concentration gradient, which may become a factor in the design of the device. For example, a concentration gradient in the channel region may have an adverse effect on the threshold voltage and thus the turn on characteristics of a field effect transistor.